The present invention relates to semiconductor devices each including a plurality of circuit blocks which are provided on one chip and have different functions.
In recent years, system LSI in which a logic circuit and a memory circuit are mounted on a single chip has been actively developed to improve the system performance.
Wiring which connects the logic circuit and the memory circuit provided on the chip is contrived using various placement and routing tools so as to minimize the possibility of a malfunction caused by a signal shift due to variation in wiring width or wiring length or a crosstalk, in a layout design including determination of a floorplan of the chip.
In addition, as shown in FIG. 16, in a chip testing process, connection of signal lines between first and second circuit blocks 101 and 102 provided on a chip 100 is checked by comparing an input signal IN input from the outside to an output signal OUT output to the outside, and means for measuring a delay time of signals transmitted on the lines (now shown) is proposed, thereby preventing a malfunction on the signal lines (see Japanese Laid-Open Publication No. 2000-155157, for example).
However, the above conventional semiconductor device has a drawback of incapability of coping with the malfunction in signal transmission between circuit blocks whose performances have been improved recently. Specifically, incorporation of various function blocks in one chip involved in the current improvement in performance causes the chip area and the clock frequency to increase. As a result, increased wiring length and minute variation among wiring lengths have become problems because a margin for operation decreases accordingly.
In addition, the operational margin of a circuit decreases because of new factors such as a voltage drop of power within the chip, so that it becomes more and more difficult to adjust the timing of signals transmitted between circuit blocks in the chip design.
Moreover, though a test or an evaluation performed on the conventional semiconductor device can detect a malfunction caused by the propagation timing of signals, no means is provided to specify a portion where the malfunction occurs. Even if a portion to be modified is specified, the mask (photomask) needs to be changed. As a result, there also arise other problems of difficulties in shortening the development period and in reducing the cost for the development.